apex microtechnology corporation ?telephone (520) 690-8600 ?fax (520) 888-3329 ?orders (520) 690-8601 ?email prodlit@apexmicrotech.com PA52A u s ab e o ? t e 9 4 9 3 1 1 features high internal dissipation ?400 watts high current ?40a continuous, 80a peak high slew rate ?50v/ s optional boost voltage inputs applications semi-conductor testing description the pa52 is a mosfet power operational amplifier that extends the performance limits of power amplifiers in slew rate and power bandwidth, while maintaining high current and power dissipation ratings. boost voltage inputs allow the small signal portion of the amplifier to operate at a higher voltage than the high current output stage. the amplifier is then biased to achieve close linear swings to the supply rails at high currents for extra efficient operation. equivalent schematic the jedec mo-127 12-pin power dip package (see package outlines) is hermetically sealed and isolated from the internal circuits. the use of compressible thermal washers and/or improper mounting torque will void the product war- ranty. please see ?eneral operating considerations? external connections top view 1 2 3 4 5 6 12 11 10 9 8 7 top view in +in -out -out -v s -v s +out +out +v b -v b +v s +v s http://www.apexmicrotech.com (800) 546-apex (800) 546-2739 microtechnology power operational amplifiers pa52 ?PA52A
apex microtechnology corporation 5980 north shannon road tucson, arizona 85741 usa applications hotline: 1 (800) 546-2739 absolute maximum ratings specifications absolute maximum ratings supply voltage, +v s to v s 200v boost voltage, +v b to -v b 230v output current, within soa 80a power dissipation, internal 400w input voltage, differential 20v input voltage, common mode v b temperature, pin solder - 10s 300 c temperature, junction 2 175 c temperature, storage 65 to +150 c operating temperature range, case 55 to +125 c pa52 PA52A specifications notes: * the specification of PA52A is identical to the specification for pa52 in applicable column to the left 1. unless otherwise noted: t c = 25 c, dc input specifications are value given. power supply voltage is typical rating. v boost = v s . 2. long term operation at the maximum junction temperature will result in reduced product life. derate internal power dissipatio n to achieve high mttf. for guidance, refer to the heatsink data sheet. 3. rating applies if the output current alternates between both output transistors at a rate faster than 60 hz. the pa52 is constructed from mosfet transistors. esd handling procedures must be observed. the internal substrate contains beryllia (beo). do not break the seal. if accidentally broken, do not crush, machine, or subject to temperatures in excess of 850 c to avoid generating toxic fumes. caution parameter test conditions 1 min typ max min typ max units input offset voltage, initial 5 10 2 5 mv offset voltage, vs. temperature full temperature range 20 50 * * v/ v offset voltage, vs. supply 10 30 * * v/v bias current, initial 10 50 * * pa bias current vs. supply .01 * pa/v offset current, initial 10 50 * * pa input impedance, dc 10" * ? imput capacitance 13 * pf common mode voltage range full temperature range v b 12 * v common mode rejection,dc full temp, range, v cm = 20v 90 100 * * db input noise 100khz bw, rs=1k ? 10 * vrms gain open loop,@ 15hz full temperature range 94 102 * * db gain bandwidth product r l =10 ? 3 * mhz power bandwidth r l =4 ? , v o =180v p-p , av=-10 90 * khz full temperature range output voltage swing i o =40a v s 9.5 v s 8.7 * * v voltage swing, pa52 v boost = v s 10v, i o =40a v s 5.8 v s 5.0 v voltage swing, PA52A v boost = v s 10v, i o =50a v s 5.8 v s 5.0 v current, peak 3ms 10% duty cycle 80 * a settling time to.1% a v = -10,10v step,r l =4 ? 1* s slew rate a v =-10 50 * v/ s resistance i o =0, no load, 2mhz 2.5 * ? power supply voltage, v boost full temperature range 12 30 115 * * * v voltage, v s full temperature range 3 100 * * v current,quiescent, boost supply 26 32 * * ma current, quiescent, total 30 36 * * ma thermal resistance,ac,junction to case 3 full temperature range, f>60hz .2 .25 * * c/w resistance,dc,junction to case full temperature range, f>60hz .25 .31 * * c/w resistance, junction to air full temperature range 12 * c/w temperature range, case meets full range specification -25 85 * * c PA52A pa52
apex microtechnology corporation telephone (520) 690-8600 fax (520) 888-3329 orders (520) 690-8601 email prodlit@apexmicrotech.com typical performance graphs pa52 PA52A 0 25 50 75 100 temperature, t ( c) 0 200 300 400 power derating internal power dissipation, p(w) 100 1k 10m frequency f (hz) 0 power supply rejection 10k 100k 1m 100 20 40 60 80 100 t = t v s = v b power supply rejection, psr (db) c 10 10 10m frequency,ff (hz) 0 120 small signal gain open loop gain response, a(db) 40 80 frequency, f (hz) small signal phase 010 304050 0 voltage drop from supply, v s ? o (v) output voltage swing 20 1 100 1k 10k 100k 1m open loop phase, ( ) 100 10m 1 10 1k 10k 100k 1m ?80 ?35 ?0 ?5 0 2 4 6 8 10 output current, i (a) o r l = 4 ? r l = 4 ? v = v s v = v s + 10v boost b o o s t frequency, f (hz) 0 common mode rejection common mode rejection, cmr (db) 40 80 100 1m 100 1k 10k 100k 20 60 10 20 100 total supply voltage, v (v) normalized quiescent current, i (x) 1m frequency, f (hz) 100k 40 60 80 s q 1 1.025 1.05 1.125 quiescent current 1.075 1.1 10 power response output voltage, v (v pp ) o 100 200 100 1 supply to output differential, (v) 10 0.1 10 80 safe operating area output current, (a) 1 dc tc = 125 c d c tc = 85 c dc tc = 25 c t = 10ms t = 1ms
apex microtechnology corporation 5980 north shannon road tucson, arizona 85741 usa applications hotline: 1 (800) 546-2739 operating considerations pa52 PA52A general please read application note 1 "general operating consid- erations" which covers stability, supplies, heat sinking, mount- ing, current limit, soa interpretation, and specification inter- pretation. visit www.apexmicrotech.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selection; apex s complete application notes library; technical seminar work- book; and evaluation kits. current limit there is no internal circuit provision for current limit in the pa52. however, the pa52 circuit board in the pa52 evaluation kit does provide a means whereby the output current can be sensed. an external circuit current limit can thereby be imple- mented if needed. see ek27 data sheet for more details. boost operation with the v boost feature the small signal stages of the amplifier are operated at higher supply voltages than the amplifier s high current output stage. +v boost (pin 11) and v boost (pin 12) are connected to the small signal circuitry of the amplifier. +v s (pin 9,10) and v s (pin 3,4) are connected to the high current output stage. an additional 10v on the v boost pins is sufficient to allow the small signal stages to drive the output transistors into saturation and improve the output voltage swing for extra efficient operation when required. when close swings to the supply rails is not required the +v boost and +v s pins must be strapped together as well as the v boost and v s pins. the boost voltage pins must not be at a voltage lower than the v s pins. compensation compensation is internally fixed for a gain of 3 or more and is not adjustable by the user. the pa52 therefore is not unity gain stable. power supply bypassing proper and sufficient power supply bypassing is crucial to proper operation of the pa52. bypass the +vb and -vb supply pins with a minimum .1 f ceramic capacitors directly at the supply pins. on the +vs and -vs pins use a combination of ceramic and electrolytic capacitors. use 1 f ceramic capaci- tors and an electrolytic capacitor at least 10 f for each amp of output current required. this data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible i naccuracies or omissions. all specifications are subject to change without notice. pa52u rev a february 2001 ? 2001 apex microtechnology corp.
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